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connection diagram 8-pin plastic mini-dip (n) and soic (r) packages 1 2 3 4 8 7 6 5 AD797 decompensation & distortion neutralization output offset null ?in +in +v s ?v s offset null top view rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ultralow distortion, ultralow noise op amp AD797 * features low noise 0.9 nv/ hz t yp (1.2 nv/ hz max) input voltage noise at 1 khz 50 nv p-p input voltage noise, 0.1 hz to 10 hz low distortion ?20 db total harmonic distortion at 20 khz excellent ac characteristics 800 ns settling time to 16 bits (10 v step) 110 mhz gain bandwidth (g = 1000) 8 mhz bandwidth (g = 10) 280 khz full power bandwidth at 20 v p-p 20 v/ s slew rate excellent dc precision 80 v max input offset voltage 1.0 v/ c v os drift specified for 5 v and 15 v power supplies high output drive current of 50 ma applications professional audio preamplifiers ir, ccd, and sonar imaging systems spectrum analyzers ultrasound preamplifiers seismic detectors adc/dac buffers product description t he ad7 97 is a very low noise, low distortion operational amplifier ideal for use as a preamplifier. the low noise of 0.9 nv/ hz and low to tal harmonic distortion of ?20 db at a udio bandwidths give the AD797 the wide dynamic range 5 0 10m 3 1 100 2 10 4 1m 100k 10k 1k frequency ? hz input voltage noise ? nv/ hz AD797 voltage noise spectral density * patent pending. necessary for preamps in microphones and mixing consoles. furthermore, the AD797? excellent slew rate of 20 v/ m s and 110 mhz gain bandwidth make it highly suitable for low fre- quency ultrasound applications. the AD797 is also useful in ir and sonar imaging applications where the widest dynamic range is necessary. the low distor- tion and 16-bit settling time of the AD797 make it ideal for buffering the inputs to adcs or the outputs of high resolu- tion dacs especially when they are used in critical applications such as seismic detection and spectrum analyzers. key features such as a 50 ma output current drive and the specified power supply voltage range of 5 to 15 volts make the AD797 an excellent general purpose amplifier. ?90 ?130 300k ?120 300 100 ?110 ?100 100k 30k 10k 3k 1k frequency ? hz thd ? db measurement limit 0.001 0.0003 0.0001 thd ? % thd vs. frequency one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?analog devices, inc., 2002
rev. d ? AD797?pecifications (@ t a = +25 c and v s = 15 v dc, unless otherwise noted) AD797a AD797b model conditions v s min typ max min typ max units input offset voltage 5 v, 15 v 25 80 10 40 m v t min to t max 50 125/180 30 60 m v offset voltage drift 5 v, 15 v 0.2 1.0 0.2 0.6 m v/ c input bias current 5 v, 15 v 0.25 1.5 0.25 0.9 m a t min to t max 0.5 3.0 0.25 2.0 m a input offset current 5 v, 15 v 100 400 80 200 na t min to t max 120 600/700 120 300 na open-loop gain v out = 10 v 15 v r load = 2 k w 120 220 v/ m v t min to t max 16 210 v/ m v r load = 600 w 115 215 v/ m v t min to t max 15 27 v/ m v @ 20 khz 2 14000 20000 14000 20000 v/v dynamic performance gain bandwidth product g = 1000 15 v 110 110 mhz g = 1000 1 15 v 450 450 mhz ? db bandwidth g = 10 15 v 8 8 mhz full power bandwidth 2 v o = 20 v p-p, r load = 1 k w 15 v 280 280 khz slew rate r load = 1 k w 15 v 12.5 20 12.5 20 v/ m s settling time to 0.0015% 10 v step 15 v 800 1200 800 1200 ns common-mode rejection v cm = cmvr 5 v, 15 v 114 130 120 130 db t min to t max 110 120 114 120 db power supply rejection v s = 5 v to 18 v 114 130 120 130 db t min to t max 110 120 114 120 db input voltage noise f = 0. 1 hz to 10 hz 15 v 50 50 nv p-p f = 10 hz 15 v 1.7 1.7 2.5 nv/ hz f = 1 khz 15 v 0.9 1.2 0.9 1.2 nv/ hz f = 10 hz? mhz 15 v 1.0 1.3 1.0 1.2 m v rms input current noise f = 1 khz 15 v 2.0 2.0 pa/ hz input common-mode 15 v 11 12 11 12 v voltage range 5 v 2.5 3 2.5 3v output voltage swing r load = 2 k w 15 v 12 13 12 13 v r load = 600 w 15 v 11 13 11 13 v r load = 600 w 5 v 2.5 3 2.5 3v short-circuit current 5 v, 15 v 80 80 ma output current 3 5 v, 15 v 30 50 30 50 ma total harmonic distortion r load = 1 k w , c n = 50 pf 15 v ?8 ?0 ?8 ?0 db f = 250 khz, 3 v rms r load = 1 k w 15 v ?20 ?10 ?20 ?10 db f = 20 khz, 3 v rms input characteristics input resistance (differential) 7.5 7.5 k w input resistance (common mode) 100 100 m w input capacitance (differential) 4 20 20 pf input capacitance (common mode) 5 5 pf output resistance a v = +1, f = 1 khz 3 3 m w power supply operating range 5 18 5 18 v quiescent current 5 v, 15 v 8.2 10.5 8.2 10.5 ma notes 1 specified using external decompensation capacitor, see applications section. 2 full power bandwidth = slew rate/2 p v peak . 3 output current for |v s ?v out | >4 v, a ol > 200 k w . 4 differential input capacitance consists of 1.5 pf package capacitance and 18.5 pf from the input differential pair. specifications subject to change without notice.
AD797 rev. d ? absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation @ +25 c 2 input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s differential input voltage 3 . . . . . . . . . . . . . . . . . . . . . . 0.7 v output short circuit duration . . . . . . . indefinite within max internal power dissipation stor age temperature range (cerdip) . . . . . . 65 c to +150 c storage temperature range (n, r suffix) . . . 65 c to +125 c operating temperature range AD797a/b . . . . . . . . . . . . . . . . . . . . . . . . . ?0 c to +85 c lead temperature range (soldering 60 sec) . . . . . . . . +300 c notes 1 stresses above those listed under ?bsolute maximum ratings?may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. metallization photo contact factory for latest dimensions. dimensions shown in inches and (mm). note the AD797 has double layer metal. only one layer is shown here for clarity. ordering guide temperature package package model range description option AD797an ?0 c to +85 c 8-pin plastic dip n-8 AD797br ?0 c to +85 c 8-pin plastic soic rn-8 AD797br-reel ?0 c to +85 c 8-pin plastic soic rn-8 AD797br-reel7 ?0 c to +85 c 8-pin plastic soic rn-8 AD797ar ?0 c to +85 c 8-pin plastic soic rn-8 AD797ar-reel ?0 c to +85 c 8-pin plastic soic rn-8 AD797ar-reel7 ?0 c to +85 c 8-pin plastic soic rn-8 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the AD797 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, p roper esd precautions are recommended to avoid performance degradation or loss of f unctionality. warning! esd sensitive device 2 internal power dissipation: 8-pin soic = 0.9 watts (t a ?5 c)/ q ja 8-pin plastic dip and cerdip = 1.3 watts ?(t a ?5 c)/ q ja thermal characteristics 8-pin plastic dip package: q ja = 95 c/w 8-pin small outline package: q ja = 155 c/w 3 the AD797? inputs are protected by back-to-back diodes. to achieve low noise, internal current limiting resistors are not incorporated into the design of this amplifier. if the differential input voltage exceeds 0.7 v, the input current should be limited to less than 25 ma by series protection resistors. note, however, that this will degrade the low noise performance of the device.
AD797?ypical performance characteristics ? rev. d horizontal scale ? 5 sec/div vertical scale ? 0.01 m v/div figure 4. 0.1 hz to 10 hz noise ?60 140 ?40 100 120 80 60 40 20 0 ?20 ?2.0 ?1.5 ?1.0 ?0.5 0.0 input bias current ? m a temperature ? c figure 5. input bias current vs. temperature 140 140 100 60 ?40 80 ?60 120 120 100 80 60 40 20 0 ?20 40 temperature ? c short circuit current ? ma source current sink current figure 6. short circuit current vs. temperature 20 0 0 20 15 5 5 10 10 15 input common-mode range ? volts supply voltage ? volts figure 1. common-mode voltage range vs. supply output voltage swing ? volts 20 0 0 20 15 5 5 10 10 15 supply voltage ? volts ?v out +v out figure 2. output voltage swing vs. supply output voltage swing ? volts p-p load resistance ? 30 10 0 10 100 10k 1k 20 v = 5v s v = 15v s w figure 3. output voltage swing vs. load resistance
AD797 rev. d ? 20 5 015 10 supply voltage ? volts 11 6 9 7 8 10 +125c +25c ?55c quiescent supply current ? ma figure 7. quiescent supply current vs. supply voltage 12 0 0 20 9 3 5 6 10 15 supply voltage ? volts output voltage ? volts rms freq = 1khz r l = 600 w g = +10 figure 8. output voltage vs. supply for 0.01% distortion 1.0 0.0 10 0.6 0.2 2 0.4 0 0.8 8 6 4 0.0015% 0.01% step size ? volts settling time ? m s figure 9. settling time vs. step size ( ) 20 1m 80 40 10 60 1 120 100 100k 10k 1k 100 140 50 75 100 125 150 cmr power supply rejection ? db common mode rejection ? db frequency ? hz psr ?supply psr +supply figure 10. power supply and common-mode rejection vs. frequency ?60 ?100 ?120 0.01 0.1 10 1.0 ?80 r l = 600 g = +10 freq = 10khz noise bw = 100khz v s = 5v = 15v v s output level ? volts thd + noise ? db w figure 11. total harmonic distortion (thd) + noise vs. output level figure 12. large signal frequency response 30 10 0 10k 100k 10m 1m 20 5v supplies 15v supplies r l = 600 w
AD797 ? rev. d 5 0 10m 3 1 100 2 10 4 1m 100k 10k 1k frequency ? hz input voltage noise ? nv/ hz figure 13. input voltage noise spectral density 120 0 100m 60 20 1k 40 100 100 80 10m 1m 100k 10k frequency ? hz open-loop gain ? db +100 +80 +60 +40 +20 0 phase margin ? degrees phase margin gain without r s * with r s * without r s * with r s * *r s = 100 see figure 22 figure 14. open-loop gain & phase vs. frequency ?60 140 ?40 100 120 80 60 40 20 0 ?20 300 150 0 ?150 ?300 input offset current ? na temperature ? c over compensated under compensated figure 15. input offset current vs. temperature ?60 140 ?40 100 120 80 60 40 20 0 ?20 120 110 100 90 80 35 30 25 20 15 slew rate ? v/ m s gain/bandwidth product ? mhz (g = 1000) temperature ? c gain/bandwidth product slew rate rising edge slew rate falling edge figure 16. slew rate & gain/bandwidth product vs. temperature 100 10k 1k 160 100 120 140 load resistance ? ohms open-loop gain ? db figure 17. open-loop gain vs. resistive load 100 0.01 10 1m 10 0.1 100 1 10k 100k 1k magnitude of output impedance ? ohms frequency ? hz * see figure 29 without c n * with c n * figure 18. magnitude of output impedance vs. frequency
AD797 rev. d ? 20pf 1k w v out 1k w v in ** see figure 32 AD797 ** 2 7 3 4 6 ** ?v s +v s figure 19. inverter connection * value of source resistance ? see text ** see figure 32 100 w r s * v out v in AD797 ** 2 7 3 4 6 ** ?v s +v s 600 w figure 22. follower connection see figure 40 for settling time test circuit. 10 90 100 0% 5v 1 m s figure 20. inverter large signal pulse response 10 90 100 0% 1 m s 5v figure 23. follower large signal pulse response 10 90 100 0% 500ns 5mv figure 25. 16-bit settling time positive input pulse 10 90 100 0% 100ns 50mv figure 21. inverter small signal pulse response 10 90 100 0% 100ns 50mv figure 24. follower small signal pulse response 10 90 100 0% 500ns 5mv figure 26. 16-bit settling time negative input pulse
AD797 rev. d ? this matching benefits not just dc precision but since it holds up dynamically, both distortion and settling time are also reduced. this single stage has a voltage gain of >5 10 6 and v os < 80 m v, while at the same time providing thd + noise of less than ?20 db and true 16 bit settling in less than 800 ns. the elimination of second stage noise effects has the additional benefit of making the low noise of the AD797 (<0.9 nv/ hz ) extend to beyond 1 mhz. this means new levels of perfor- mance for sampled data and imaging systems. all of this perfor- mance as well as load drive in excess of 30 ma are made possible by analog devices?advanced complementary bipolar (cb) process. another unique feature of this circuit is that the addition of a single capacitor, c n (figure 28), enables cancellation of distor- tion due to the output stage. this can best be explained by referring to a simplified representation of the AD797 using idealized blocks for the different circuit elements (figure 29). a single equation yields the open-loop transfer function of this amplifier, solving it (at node b) yields: v o v in = gm c n a j w c n j w c c a j w gm = the transconductance of q1 and q2 a = the gain of the output stage, (~1) v o = voltage at the output v in = differential input voltage when c n is equal to c c this gives the ideal single pole op amp response: v o v in = gm j w c the terms in a, which include the properties of the output stage such as output impedance and distortion, cancel by simple subtraction, and therefore the distortion cancellation does not affect the stability or frequency response of the ampli- fier. with only 500 m a of output stage bias the AD797 delivers a 1 khz sine wave into 600 w at 7 v rms with only 1 ppm of distortion. i1 i2 +in q1 q2 i3 ?in c c i4 out c n c b current mirror 1 a a figure 29. AD797 block diagram theory of operation the new architecture of the AD797 was developed to overcome inherent limitations in previous amplifier designs. previous precision amplifiers used three stages to ensure high open-loop gain, figure 27b, at the expense of additional frequency com- pensation components. slew rate and settling performance are usually compromised, and dynamic performance is not ad- equate beyond audio frequencies. as can be seen in figure 27b, the first stage gain is rolled off at high frequencies by the com- pensation network. second stage noise and distortion will then appear at the input and degrade performance. the AD797 on the other hand, uses a single ultrahigh gain stage to achieve dc as well as dynamic precision. as shown in the simplified sche- matic (figure 28), nodes a, b, and c all track in voltage forcing the operating points of all pairs of devices in the signal path to match. by exploiting the inherent matching of devices fabricated on the same ic chip, high open-loop gain, cmrr, psrr, and low v os are all guaranteed by pairwise device matching (i.e., npn to npn & pnp to pnp), and not absolute parameters such as beta and early voltage. r1 c1 r l v out gain = gmr1 5 x 10 6 buffer gm a. gm r1 c1 r l v out gain = gmr1 *a2 *a3 r2 a2 a3 c2 buffer b. figure 27. model of AD797 vs. that of a typical three-stage amplifier r2 r3 +in q1 q2 i1 ?in q5 i7 q6 c c i4 q7 r1 q3 q4 q12 i5 q8 q9 i6 q11 q10 out v cc v ss c n c a b figure 28. AD797 simplified schematic
AD797 rev. d ? noise and source impedance considerations the AD797? ultralow voltage noise of 0.9 nv/ hz is achieved with special input transistors running at nearly 1 ma of collector current. it is important then to consider the total input referred noise ( e n total ), which includes contributions from voltage noise ( e n ), current noise ( i n ), and resistor noise ( 4 ktr s ). e n total = [ e n 2 + 4 ktr s + 4 ( i n r s ) 2 ] l/2 equation 1 where r s = total input source resistance. this equation is plotted for the AD797 in figure 30. since optimum dc performance is obtained with matched source resis- tances, this case is considered even though it is clear from equa- tion 1 that eliminating the balancing source resistance will lower the total noise by reducing the total r s by a factor of two. at very low source resistance (r s < 50 w ), the amplifiers?voltage noise dominates. as source resistance increases the johnson noise of r s dominates until at higher resistances (r s >2 k w ) the current noise component is larger than the resistor noise. 100 1 0.1 10 10 100 1000 10000 source resistance ? w noise ? nv/ hz total noise resistor noise only figure 30. noise vs. source resistance the AD797 is the optimum choice for low noise performance provided the source resistance is kept <1 k w . at higher values of source resistance, optimum performance with respect to noise alone is obtained with other amplifiers from analog devices (see table i). table i. recommended amplifiers for different source impedances r s , ohms recommended amplifier 0 to <1 k AD797 1 k to <10 k ad743/ad745, op27/op37, op07 10 k to <100 k ad743/ad745, op07 >100 k ad548, ad549, ad711, ad743/ad745 low frequency noise analog devices specifies low frequency noise as a peak to peak (p-p) quantity in a 0.1 hz to 10 hz bandwidth. several tech- niques can be used to make this measurement. the usual tech- niq ue involves amplifying, filtering, and measuring the amplifiers noise for a predetermined test time. the noise bandwidth of the filter is corrected for and the test time is carefully controlled since the measurement time acts as an additional low frequency roll-off. the plot in figure 4 was made using a slightly different tech- nique. here an fft based instrument (figure 31) is used to generate a 10 hz ?rickwall?filter. a low frequency pole at 0.1 hz is generated with an external ac coupling capacitor, the instrument being dc coupled. several precautions are necessary to get optimum low frequency noise performance: 1. care must be used to account for the effects of r s , even a 10 w resistor has 0.4 nv/ hz of noise (an error of 9% when root sum squared with 0.9 nv/ hz ). 2. the test set up must be fully warmed up to prevent e os drift from erroneously contributing to input noise. 3. circuitry must be shielded from air currents. heat flow out of the package through its leads creates the opportunity for a thermoelectric potential at every junction of different metals. selective heating and cooling of these by random air currents will appear as 1/f noise and obscure the true device noise. 4. the results must be interpreted using valid statistical techniques. 100k w 1.5 m f 1 w hp 3465 dynamic signal analyzer (10hz) v out ** use power supply bypassing shown in figure 32. AD797 ** 2 7 3 4 6 ** ?v s +v s figure 31. test setup for measuring 0.1 hz to 10 hz noise wideband noise the AD797, due to its single stage design, has the property that its noise is flat over frequencies from less than 10 hz to beyond 1 mhz. this is not true of most dc precision amplifiers where second stage noise contributes to input referred noise beyond the audio frequency range. the AD797 offers new levels of performance in wideband imaging applications. in sampled data systems, where aliasing of out of band noise into the signal band is a problem, the AD797 will out perform all previously avail- able ic op amps.
AD797 rev. d ?0 bypassing considerations to take full advantage of the very wide bandwidth and dynamic range capabilities of the AD797 requires some precautions. first, multiple bypassing is recommended in any precision application. a 1.0 m f?.7 m f tantalum in parallel with 0.1 m f ceramic bypass capacitors are sufficient in most applications. when driving heavy loads a larger demand is placed on the supply bypassing. in this case selective use of larger values of tantalum capacitors and damping of their lead inductance with small value (1.1 w to 4.7 w ) carbon resistors can be an improve- ment. figure 32 summarizes bypassing recommendations. the symbol (**) is used throughout this data sheet to represent the parallel combination of a 0.1 m f and a 4.7 m f capacitor. v s 0.1 m f use short lead lengths (<5mm) kelvin return load current 4.7 ? 22.0 m f use short lead returns (<5mm) or 4.7 m f v s 1.1 ? 4.7 w 0.1 m f kelvin return load current figure 32. recommended power supply bypassing the noninverting configuration ultralow noise requires very low values of r bb ?(the internal parasitic resistance) for the input transistors ( a 6 w ). this im- plies very little damping of input and output reactive interac- tions. with the AD797, additional input series damping is required for stability with direct input to output feedback. a 100 w resistor in the inverting input (figure 33) is sufficient; the 100 w balancing resistor (r2) is recommended, but is not required for stability. the noise penalty is minimal (e n total a 2.1 nv/ hz ), which is usually insignificant. best response flatness is obtained with the addition of a small capacitor (c l < 33 pf) in parallel with the 100 w resistor (figure 34). the input source resistance and capacitance will also affect the response slightly and experimentation may be necessary for best results. r2 100 w r1 100 w v out ** use power supply bypassing shown in figure 32. v in r l 600 w AD797 ** 2 7 3 4 6 ** ?v s +v s figure 33. voltage follower connection low noise preamplification is usually done in the noninverting mode (figure 35). for lowest noise the equivalent resistance of the feedback network should be as low as possible. the 30 ma minimum drive current of the AD797 makes it easier to achieve this. the feedback resistors can be made as low as possible with due consideration to load drive and power consumption. table ii gives some representative values for the AD797 as a low noise follower. operation on 5 volt supplies allows the use of a 100 w or less feedback network (r1 + r2). since the AD797 shows no unusual behavior when operating near its maximum rated current, it is suitable for driving the ad600/ad602 (figure 47) while preserving their low noise performance. optimum flatness and stability at noise gains >1 sometimes requires a small capacitor (c l ) connected across the feedback resistor (r1, figure 35). table ii includes recommended values of c l for several gains. in general, when r2 is greater than 100 w and c l is greater than 33 pf, a 100 w resistor should be placed in series with c l . source resistance matching is assumed, and the AD797 should never be operated with unbal- anced source resistance >200 k w /g. r s * c s * 100 AD797 ** 2 7 3 4 6 ** v out ?v s +v s * see text ** use power supply bypassing shown in figure 32. v in 600 c l w w figure 34. alternative voltage follower connection r2 r1 r l AD797 ** 2 7 3 4 6 ** v out ?v s +v s ** use power supply bypassing shown in figure 32. v in c l figure 35. low noise preamplifier table ii. values for follower with gain circuit noise gain r1 r2 c l (excluding r s ) 21 k w 1 k wa 20 pf 3.0 nv/ hz 2 300 w 300 wa 10 pf 1.8 nv/ hz 10 33.2 w 300 wa 5 pf 1.2 nv/ hz 20 16.5 w 316 w 1.0 nv/ hz >35 10 w (g?) ?10 w 0.98 nv/ hz the i-to-v converter is a special case of the follower configura- tion. when the AD797 is used in an i-to-v converter, for in- stance as a dac buffer, the circuit of figure 36 should be used. t he value of c l depends on the dac and again, if c l is
AD797 rev. d ?1 600 100 20?120pf AD797 ** 2 7 3 4 6 ** v out ?v s +v s * see text ** use power supply bypassing shown in figure 32. i in r s * c s * r1 w w figure 36. i-to-v converter connection greater than 33 pf a 100 w series resistor is required. a by- passed balancing resistor (r s and c s ) can be included to mini- mize dc errors. the inverting configuration the inverting configuration (figure 37) presents a low input impedance, r1, to the source. for this reason, the goals of both low no ise and input buffering are at odds with one a nother. nonetheless, the excellent dynamics of the AD797 will make it the pr eferred choice in many inverting applications, and with care- ful selection of feedback resistors the noise penalties will be mini- mal . some examples are presented in table ii and figure 37. r l c l v in AD797 ** 2 7 3 4 6 ** v out ?v s +v s * see text ** use power supply bypassing shown in figure 32. r s * r2 r1 figure 37. inverting amplifier connection table iii. values for inverting circuit noise gain r1 r2 c l (excluding r s ) ? 1 k w 1 k wa 20 pf 3.0 nv/ hz ? 300 w 300 wa 10 pf 1.8 nv/ hz ?0 150 w 1500 wa 5 pf 1.8 nv/ hz driving capacitive loads the capacitive load driving capabilities of the AD797 are dis- played in figure 38. at gains over 10 usually no special precau- tions are necessary. if more drive is desirable the circuit in figure 39 should be used. here a 5000 pf load can be driven cleanly at any noise gain 2. 100nf 10nf 1pf 110 1k 100 1nf 100pf 10pf closed-loop gain capacitive load drive capability figure 38. capacitive load drive capability vs. closed loop gain 100 1k c1 1k 20pf 33 v in AD797 ** 2 7 3 4 6 ** v out ?v s +v s ** use power supply bypassing shown in figure 32. 200pf w w w w figure 39. recommended circuit for driving a high capacitance load settling time the AD797 is unique among ultralow noise amplifiers in that it settles to 16 bits (<150 m v) in less than 800 ns. measuring this performance presents a challenge. a special test setup (figure 40) was developed for this purpose. the input signal was ob- tained from a resonant reed switch pulse generator, available from tektronix as calibration fixture no. 067-0608-00. when open, the switch is simply 50 w to ground and settling is purely a passive pulse decay and inherently flat. the low repetition rate signal was captured on a digital oscilloscope after being ampli- fied and clamped twice. the selection of plug-in for the oscillo- scope was made for minimum overload recovery.
AD797 rev. d ?2 0.47f 250 0.47f 4.26k 1k 100 1k 2x hp2835 (via less than 1ft 50 coaxial cable) v error x 5 1k 20pf 51pf note: use circuit board with ground plane 1k tektronix calibration fixture v in 20pf 1m to tektronix 7a26 oscilloscope preamp input section a1 AD797 7 4 6 ?v s +v s 1f 0.1f 1f 0.1f 3 2 a2 ad829 7 4 6 ?v s +v s 3 2 2x hp2835 226 w w w w w ww w w w figure 40. settling time test circuit distortion reduction t he AD797 has distortion performance (thd < ?20 db, @ 20 khz, 3 v rms, r l = 600 w ) unequaled by most voltage feedback amplifiers. at higher gains and higher frequencies thd will increase due to reduction in loop gain. however in contrast to most conven- tional voltage feedback amplifiers the AD797 provides two effec- tive means of reducing distortion, as gain and frequency are increased; cancellation of the output stage? distortion and gain bandwidth enhancement by decompensation. by applying these techniques gain bandwidth can be increased to 450 mhz at g = 1000 and distortion can be held to ?00 db at 20 khz for g = 100. the unique design of the AD797 provides for cancellation of the output stage? distortion (patent pending). to achieve this a capacitance equal to the effective compensation capacitance, usually 50 pf, is connected between pin 8 and the output (c2 in figure 41). use of this feature will improve distortion perfor- mance when the closed loop gain is more than 10 or when fre- quencies of interest are greater than 30 khz. bandwidth enhancement via decompensation is achieved by connecting a capacitor from pin 8 to ground (c1 in figure 41) effectively subtracting from the value of the internal compensa- tion capacitance (50 pf), yielding a smaller effective compensa- tion capacitance and, therefore, a larger bandwidth. the benefits of this begin at closed loop gains of 100 and up. a maximum value of a 33 pf at gains of 1000 and up is recom- mended. at a gain of 1000 the bandwidth is 450 khz. table iv and figure 42 summarize the performance of the AD797 with distortion cancellation and decompensation. r1 v in r2 50pf AD797 2 8 3 6 a. c1, see table c2 = 50pf ? c1 r1 v in r2 AD797 2 8 3 6 c1 c2 b. figure 41. recommended connections for distortion cancellation and bandwidth enhancement table iv. recommended external compensation a/b a b r1 r2 c1 c2 3 db c1 c2 3 db ww (pf) bw (pf) bw g = 10 909 100 0 50 6 mhz 0 50 6 mhz g = 100 1 k 10 0 50 1 mhz 15 33 1.5 mhz g = 1000 10 k 10 0 50 110 khz 33 15 450 khz ?80 300k ?120 300 100 ?110 ?100 ?90 100k 30k 10k 3k 1k frequency ? hz thd ? db 0.01 0.003 0.001 0.0003 0.0001 thd ? % noise limit, g=1000 noise limit, g=100 g=1000 r l =10k w g=1000 r l =600 w g=10 r l =600 w g=100 r l =600 w figure 42. total harmonic distortion (thd) vs. frequency @ 3 v rms for figure 41b
AD797 rev. d ?3 differential line receiver the differential receiver circuit of figure 43 is useful for many applications from audio to mri imaging. it allows extraction of a low level signal in the presence of common-mode noise. as shown in figure 44, the AD797 provides this function with only 9 nv/ hz noise at the output. figure 45 shows the AD797? 20-bit thd performance over the audio band and 16-bit accu- racy to 250 khz. 20pf use power supply bypassing shown in figure 32. ** AD797 1k w +v s ** ** ?v s 1k w 2 3 6 7 4 8 1k w differential input 20pf output 50pf* *optional 1k w figure 43. differential line receiver 16 6 10m 12 8 100 10 10 14 1m 100k 10k 1k frequency ? hz output voltage noise ? nv/ hz figure 44. output voltage noise spectral density for differential line receiver a general purpose ate/instrumentation input/output driver the ultralow noise and distortion of the AD797 may be com- bined with the wide bandwidth, slew rate, and load drive of a current feedback amplifier to yield a very wide dynamic range general purpose driver. the circuit of figure 46 combines the AD797 with the ad811 in just such an application. using the ?90 ?130 300k ?120 300 100 ?110 ?100 100k 30k 10k 3k 1k 0.003 0.0003 0.001 thd ? % thd ? db frequency ? hz with optional 50c n measurement limit without optional 50pf c n 0.0001 figure 45. total harmonic distortion (thd) vs. frequency for differential line receiver component values shown, this circuit is capable of better than ?0 db thd with a 5 v, 500 khz output signal. the circuit is therefore suitable for driving high resolution a/d converters and as an output driver in automatic test equipment (ate) systems. using a 100 khz sine wave, the circuit will drive a 600 w load to a level of 7 v rms with less than ?09 db thd, and a 10 k w load at less than ?17 db thd. 1k w use power supply bypassing shown in figure 32. ** input 22pf output ?v s 2k w 649 w 649 w r2 ?v s AD797 ** 2 7 3 4 6 ** +v s ad811 ** 2 7 3 4 6 ** +v s 2 figure 46. a general purpose ate/lnstrumentation input/ output driver
AD797 rev. d ?4 100m 1k 100 100 0 60 20 40 80 10m 1m 100k 10k frequency ? hz voltage noise ? m vrms (0.1hz ? fre q ) v out ? db re 1v/ m a ?80 ?30 ?50 ?70 ?60 ?40 noise v out figure 49. total integrated voltage noise & v out of amorphous detector preamp professional audio signal processing?ac buffers the low noise and low distortion of the AD797 make it an ideal choice for professional audio signal processing. an ideal i-to-v converter for a current output dac would simply be a resistor to ground, were it not for the fact that most dacs do not oper- ate linearly with voltage on their output. standard practice is to operate an op amp as an i-to-v converter creating a virtual ground at its inverting input. normally, clock energy and cur- rent steps must be absorbed by the op amp? output stage. however, in the configuration of figure 50, capacitor c f shunts high frequency energy to ground, while correctly repro- ducing the desired output with extremely low thd and imd. c1 2000pf c f 82pf 3k w AD797 ** 2 7 3 4 6 ** ?v s +v s ** use power supply bypassing shown in figure 32. 100 w ad1862 dac figure 50. a professional audio dac buffer figure 51. offset null configuration ultrasound/sonar imaging preamp t he a d600 variable gain amplifier provides the time controlled gain ( tcg) function necessary for very wide dynamic range sonar and low frequency ultrasound applications. under some circumstances, it is necessary to buffer the input of the ad600 to preserve its low noise performance. to optimize dynamic range this buffer should have at most 6 db of gain. the combi- nation of low noise and low gain is difficult to achieve. the input buffer circuit shown in figure 47 provides 1 nv/ hz noise performance at a gain of two (dc to 1 mhz) by using 26.1 w resistors in its feedback path. distortion is only ?0 dbc @ 1 mhz at a 2 volt p-p output level and drops rapidly to better than ?0 dbc at an output level of 200 mv p-p. 26.1 input 7 4 3 2 AD797 ** ** ad600 ** ** 6 26.1 v ou t v s = 6vdc +v s ?v s * use power supply ** bypassing shown in figure 32. w w figure 47. an ultrasound preamplifier circuit amorphous (photodiode) detector large area photodiodes c s 500 pf and certain image detec- tors (amorphous si), have optimum performance when used in conjunction with amplifiers with very low voltage rather than very low current noise. figure 48 shows the AD797 used with an amorphous si (c s = 1000 pf) detector. the response is adjusted for flatness using capacitor c l , while the noise is domi- nated by voltage noise amplified by the ac noise gain. the 797? excellent input noise performance gives 27 m v rms total noise in a 1 mhz bandwidth, as shown by figure 49. 50pf c s i s 1000pf 10k w AD797 ** 2 7 3 4 6 ** ?v s +v s ** use power supply bypassing shown in figure 32. c l 100 w figure 48. amorphous detector preamp
AD797 rev. d ?5 outline dimensions 8-lead plastic dual-in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeters dimensions (in parentheses) compliant to jedec standards mo-095aa 8-lead standard small outline package [soic] narrow body (rn-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa *see military data sheet for 883b specifications.
AD797 rev. d ?6 c00846??0/02(d) printed in u.s.a. revision history location page 10/02?ata sheet changed from rev. c to rev. d. deleted 8-lead cerdip package (q-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . universal edits to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 edits to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 edits to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 edits to table i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 deleted operational amplifiers graphic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 updtated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

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